I am an Assistant Professor in the Computer Science and Electrical Engineering Departments at Stanford University , where I lead the High Assurance Computer Architectures Lab . Prior to starting at Stanford, I spent nine months as a Research Scientist at Facebook in the FAIR SysML group. My research interests are in the area of computer architecture, with a focus on promoting correctness and security as first-order computer systems design metrics (akin to performance and power). A central theme of my work i
My research has influenced the design of the RISC-V ISA memory consistency model both via my formal analysis of its draft specification and my subsequent participation in the RISC-V Memory Model Task Group. Additionally, my work produced a novel methodology and tool that synthesized two new variants of the now-famous Meltdown and Spectre attacks.
My research has been recognized with IEEE Top Picks distinctions, the NSF CAREER Award (2023), the 2020 ACM SIGARCH/IEEE CS TCCA Outstanding Dissertation Award, and the 2020 CGS/ProQuest® Distinguished Dissertation Award in Mathematics, Physical Sciences, & Engineering. I was also awarded an NVIDIA Graduate Fellowship (2017-2018) and selected to attend the 2018 MIT Rising Stars in EECS Workshop. I completed my PhD in Computer Science at Princeton University and my BS in Computer Engineering at Purdue Univer