jianyicheng.github.io - Dr Jianyi Cheng

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I am a Ph.D. candidate in the Circuits and Systems (CAS) group at Imperial College London, supervised by Prof. George A. Constantinides and Dr. John Wickerson .

My research aims to produce smaller and faster hardware using formal methods . My current work is mainly focused on high-level synthesis (HLS) tool optimisation, including AMD Xilinx Vitis HLS , LegUp , Dynamatic , CIRCT , ScaleHLS and Phism .

My research interests include hardware programming, programming language, static analysis, formal verification and probabilistic programming.

Links to jianyicheng.github.io (3)