sugawara-systems.com - Veritak Verilog HDL Simulator & VHDL Translator

Description: Verilog HDL Compiler/Simulator supporting major Verilog-2001 HDL features. It is integral environment including VHDL to Verilog translator, syntax highlight editor (Veripad), class hierarchy viewer ,multiple waveform viewer ,and more.

translator (929) simulator (534) vhdl (89) verilog (59)

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May.1.2007 Veritak Version 3.34G Released. Apr.26.2007 Veritak Version 3.34F Released Apr.19.2007 Veritak Version 3.34D Released Apr.18.2007 Veritak Version 3.34B Released Apr.9.2007 Veritak Version 3.33A Released Apr.7.2007 Veritak Version 3.32E Released Apr.2.2007 Veritak Version 3.32D Released Apr.1.2007 Veritak Version 3.32C Released Mar.30.2007 Veritak Version 3.32B Released Mar.25.2007 Veritak Version 3.32A Released Mar.8.2007 Veritak Version 3.30A Released Feb.28.2007 Veritak Version 3.29D Released F

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